Recent Advances in Electrical & Electronic Engineering - Volume 15, Issue 3, 2022

Background: For high computation, parallel and distributed processing chip multiprocessors are widely used. In chip multiprocessors, large on chip cache memories are used for performance improvement and speedy execution of the task. These cache memories consume 13% to 45% of the overall power consumed by the entire chip. As chip size shrinks with technology scaling, static energy consumed by the chip increases. This results in heating and chip malfunctioning. To solve this problem we apply static energy reduction techniques to Last Level Cache (LLC) to reduce static energy consumption and thereby chip temperature rise. Methods: Static energy reduction is achieved with two methods. DIM_OLY_SEL Policy: In this policy, static Energy Reduction is achieved by dimming cache banks. DIM_DARK_PAT Policy: In this method, dimming as well as darkening techniques are used to save static energy and thereby, temperature reduction. Results: With the implementation of DIM_OLY_SEL policy LLC, Temperature Reduction up to 1.4 Kelvin, improvements in EDP (Energy Delay Product) gains up to 28% and leakage energy Saving up to 23% is observed. With the implementation of DIM_DARK_PAT, we observed LLC temperature reduction up to 4.7 Kelvin, EDP gain improvement of 33 % and leakage energy saving 23%. Conclusion: DIM_OLY_SEL and DIM_DARK_PAT Policies are observed to be very effective policies for energy saving and chip temperature reduction. Hence, they can be used effectively for safe chip multiprocessor functioning.

Background: This document presents a dual sliding mode vector control method to estimate speed and position of Permanent Magnet Linear Synchronous Motor (PMLSM). Methods: Firstly, the motor simulation model is built based on the mathematical model of PMLSM. For the sake of solving the problems of the jitter and position angle deviation in the traditional SMO, the inverse hyperbolic tangent function is used and the software phase-locked loop algorithm is introduced, and the gain of exponential approach rate is improved to change the real-time, so as to eliminate the problems of high-frequency jitter and angle deviation. Secondly, global fractional order integral sliding mode control (GFOISMC) is used to replace PI control to eliminate jitter and improve the robustness to load disturbance. Finally, the dynamic performance of the system under constant speed no-load and constant speed sudden load is simulated. Results: The simulation result proves a proposed dual sliding mode control strategy combining the improved SMO and GFOISMC that can effectively reduce the jitter and improve robustness. Conclusion: In this paper, two sensorless control strategies are compared and their robust performance is studied. The two control scheme is simulated in the MATLAB/Simulink environment.

Background: Circularly polarized (CP) antenna is an effective choice for wireless systems due to its insensitivity to the orientations of electromagnetic waves. Objective: A novel CP triangular patch antenna (CPTA) system is designed for ultra-wideband (UWB) applications. Methods: The CPTA, with a total size of 40.6 x 40.9 x 1.6 mm³, comprises a triangular patch positioned on the aperture of a V-shaped ground plane and a feeding network that powers the two corners of the patch. The network consists of a T-shaped divider with a 50 Ohm microstrip transmission line (MTL) and two 100 Ohm MTLs, and two matching strips are inserted at the end of the MTLs. Results: The antenna system shows UWB performance for both impedance bandwidth (IM-BW) of 4-11 GHz and axial ratio bandwidth (AR-BW) of 3.5-8.0 GHz. A detailed review is further carried out to manifest the superiority of CPTA over the state-of-the-art technology. Conclusion: It thus provides compatible IM-BW and AR-BW for UWB operations due to its optimal compact design.

Introduction: This paper presents an approach for multistage expansion planning of the active distribution system network problems by considering multiple strategies based on system investment cost, including renewable energy sources based on distributed generation units, operational cost, and reliability. Objective: The developed framework model fulfills the prospects related to techno-economical and reliable multistage expansion planning of active distribution system network for the sustainable development of electric power system. Methods: The mathematical model of the multi-objective function has been developed with the investment decision variables to compute the investment cost. The reliability of the active distribution system network is evaluated in non-supplied energy costs under contingency conditions with and without DGs. Results: The result validates the constraints associated with planning, investment decisions, power quality, and reliability of the system. Conclusion: This study also demonstrates the improvement in per unit (p.u.) voltage of bus nodes for each period of network expansion with DGs over the planning horizon. The proposed method is tested and validated on a 54-bus, 11 kV long-term active distribution network.

Objectives: In this paper, the performance of pulse position modulation (PPM), nonreturn zero modulation (NRZ), and return zero modulation (RZ) at signal-to-noise ratio and bit error rate in free space optical communication is compared. This comparison is performed to obtain the most effective modulation in atmospheric attenuations. Also, the effect of increasing transmitter power on the bit error rate and signal-to-noise ratio is investigated. Methods: Utilizing a light source with a wavelength of 1550 nm, the system is simulated in MATLAB by choosing the Kim data transmission link model with different visibility values of 0- 10 km. The analytical equations of free space optical communications are implemented by selecting appropriate parameters. The effects of weak, moderate, and strong atmospheric attenuation, geometric loss, and different transmitter powers (1-5 mW) on bit error rate and signal-to-noise ratio are investigated for all three modulations. Results: The results show that PPM is the most effective modulation compared to other modulations used in this study and shows a better performance in the mentioned atmospheric attenuation conditions within the given values of bit error rate and signal-to-noise ratio. Conclusion: Modulations with lower average power will perform better than other modulations in bit error rate and signal-to-noise ratio under the same atmospheric attenuation conditions. In PPM modulation, increasing the transmitter power causes more reduction in the bit error rate than other modulations used in this paper. Therefore, using this modulation to optimize the power budget in free space optical communications will be appropriate.

Background: As the integration of communication networks with power systems is getting closer, the number of malicious attacks against the cyber-physical power system is increasing substantially. The data integrity attack can tamper with the measurement information collected by Supervisory Control and Data Acquisition (SCADA), which can affect important decisions of the power grid and pose a significant threat to normal operation. Objective: In order to defend against the data integrity attack, and safeguard the normal operation of the power system, we propose a defense method based on improved WGAN (Wasserstein Generative Adversarial Networks). Methods: Firstly, through the training of the discriminator and generator, the discriminator identifies and eliminates the measurements damaged by the data integrity attack, and the generator uses the temporal and spatial correlation of the power grid measurements to generate complementary measurements which are infinitely close to the original normal data. Meanwhile, using the improved WGAN, the training stability and the convergence speed are significantly improved, and the quality of complementary data is much higher. Results: Extensive simulation experiments were carried out in the IEEE-14 and IEEE-118 standard bus systems. By comparing the deviations between the complementary data and normal data under different iteration times and methods, the mean squared error of the deviations with the proposed method is greatly reduced than traditional methods. The excellent recovery performance of the defense method based on improved WGAN is verified. Conclusion: A smart grid data integrity attack defense method based on improved WGAN is proposed to detect data integrity attacks, and the experimental results demonstrate the recovery effectiveness of the proposed method.

Background: The challenges in real-time multithreading, particularly in the efficiency of multithreaded applications running concurrently on multiple cores, have evolved significantly due to the increase in IoT, cloud and edge computing applications. The continuous increase in cores depth adds further research issues related to the efficiency of such multicore systems and their applications. Therefore, further research is still required. Multicore systems can achieve higher performance running in parallel multiple multithreaded applications. However, efficient parallelisation of multiple threads among many cores is not an easy task. Field Programmable Gate Arrays (FPGAs) is a preferred technology for the rapid design and experimentation with such architectures, based primarily on softcore processors. Objectives: The purpose of this research is to investigate the efficiency of running in parallel and concurrently multithreaded applications on a 4-core FPGA multicore architecture. Methods: The design of a 4-core FPGA architecture is implemented with Nios II/f soft processors on a Cyclone IV series chip, having real-time Linux operating system (OS) support. A multithreaded application with specific compute-intensive tasks is developed in C, and is used to obtain measurements in specific efficiency metrics under different core configurations. Results: The reliability of the proposed 4-core FPGA architecture is validated against 4-core and 2- core development platforms, respectively, on Raspberry Pi4 and BeagleBone AI single board computers. The results have been analysed and evaluated upon performance metrics, including execution time, response time, speedup, and cores usage. The experimental tests demonstrate the validity and efficiency of the approach to using FPGA for experimentations with multithreaded applications. Conclusion: The obtained results show that the proposed FPGA architecture stands well both in terms of timing and efficiency metrics. Execution times are about 50% lower, and the average speedup at 21% is fairly close to that of 33% for the Raspberry Pi4, and higher than BeagleBone AI (10%). The proposed measurements approach and evaluation methodology could benefit the design and development of real-time systems utilizing operating systems with real-time support in emerging areas, such as embedded devices in real-time control.