A Review of QCA Nanotechnology as an Alternate to CMOS

Background: The human ken about esoteric phenomenon develops the period from space to the sub-atomic level. The passion to further explore the unexplored domains and dimensions boosts human advancement in a cyclic way. A significant part of such passion follows in the electronics industry. Moore’s law is reaching the practical limitations because of further scaling of metal oxide semiconductor (MOS) devices. There is a need for a more dexterous and effective technological approach. Quantum-dot cellular automata (QCA) is an emerging technology which avoids the physical limitations of the MOS device. QCA is a dynamic computational transistor paradigm that addresses device density, power, operating frequency and interconnection problems. It requires an extensive study to know the fundamentals of logic implementation. Objective: Immense research and experiments led to the evolving nanotechnology and a feasible alternative to complementary metal-oxide semiconductor (CMOS) technology. A comprehensive study is presented in the paper to enhance the basics of QCA technology and the way of implementation of the logic circuits. Different existing circuits using QCA technology are discussed and compared for different parameters. Methods: Scaling the devices can reduce the power consumption of the MOS device. Quantum dots are nanostructures made from semi-conductive conventional materials. It is possible to model these constructions as 3-dimensional (3D) quantum energy wells. Logical operations and data movement are performed using Coulumbic interaction between nearby QCA cells instead of the current flow. Results: The focus of this review paper is to study the trends which have been proposed and compare the designs of various digital circuits. The performance of different circuits such as XOR, adder, reversible gates and flip-flops is provided. Different logic circuits are compared in terms of the parameters such as cell count, area and latency. At least 10 QCA cells are used for the XOR gate with 1 clock latency. Minimum 44 QCA cells are required to make a full adder with 1.25 clock latency. Conclusion: Designers may choose the best-fitted circuit in their logic implementation on the basis of the comparison. The comprehensive study of the QCA technology helps the researchers to learn this field fast and work to make the design of less cell count and latency.